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the trigger circuits with a different notation partly to simplify the drawing and partly because they will in fact be made up from different circuits. There is also another practical difference. The output from a trigger circuit will be a D.C. voltage, so long as it is not disturbed one way or the other, whereas the output from a limiting amplifier with feedback is more or less pulsiform.

(v) Differentiator circuit and change circuit. We sometimes wish to indicate an output from a trigger circuit either at the beginning or the end of its stimulation. This would in fact be done with a capacity resistance ‘differentiator’ circuit. Such a circuit designed to produce a positive (excitatory) pulse at the beginning will be denoted by —(B)— and one at the end by —(E)—. These are understood to be respectively equivalent to the two circuits of Fig. 5. We may also occasionally wish to make connection to a trigger circuit in such a way that stimulus always changes the condition of the trigger circuit, either from stimulation to non-stimulation or vice-versa. This is indicated by a small square at the connection point thus

and is equivalent to Fig. 6.

(vi) The trigger limiter. Sometimes we wish a continuously varying voltage to initiate a train of pulses, the pulses to be synchronous with the clock and to start approximately when the continuous voltage reaches a certain value. All of the pulses that occur must be of the standard or unit size. There must definitely be no half-size pulses possible. The train of pulses may be stopped by pulses from some other source.

This valve element is indicated by a somewhat squat rectangle containing the letters TL. The continuous voltage input is shown as in an excitatory connection and the stopping pulse as an inhibitory connection, as in Fig. 7.

(vii) The adder and other examples. We may now illustrate the use of these circuit elements by means of some simple examples.

The simplest circuit perhaps is that for the logical ‘or’ (cf. p. 21). In the circuit of Fig. 8 there is an output pulse from the unnamed element if there is one from any one of A, B, C. We shall find it convenient in such cases to describe this element as A v B v C. The circuits of Fig. 9 are self explanatory in view of our treatment of A v B v C.

An adder network is shown in Fig. 10. It will add two numbers which enter along the leads shown on the left in binary from, with the least significant digit first, the output appearing on the right. An input signal from the top will inhibit any output. The method of operation is as follows. The three valve elements on the left all have stimulation from the same three sources, viz. the two inputs and one corresponding to the carry digit from the last figure, which was formed by the element with threshold 2. We can distinguish the four different possible totals 0, 1, 2, 3 according to which of the valve elements are stimulated. We wish to get an output pulse if the total is 1 or 3. This may be expressed as a pulse if the total is 3 or if it is 1 and not 2 or more. If we write Tn to mean ‘the total is n or more’ the condition is T3 v (T1 & ~T2). Using our standard networks for A v B and for A & ~ B and observing that the three valve elements on the left of the adder are stimulated respectively in the cases T1, T2, T3 we finally obtain the circuit given.

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